Pentium 4 Core Views
Pentium 4 CPUs introduced the SSE2 and, in the Prescott-based Pentium 4s, SSE3 instruction sets to accelerate calculations, transactions, media processing, 3D graphics, and games. Later versions featured Hyper-Threading Technology (HTT), a feature to make one physical CPU work as two CPUs, one logical and one virtual. Intel also marketed a version of their low-end Celeron processors based on the NetBurst microarchitecture (often referred to as Celeron 4), and a high-end derivative, Xeon, intended for multiprocessor servers and workstations. In 2005, the Pentium 4 was complemented by the Pentium D and Pentium Extreme Edition dual-core CPUs.
The Pentium 4 has an integrated heat spreader (IHS) that prevents the die from accidentally getting damaged when mounting and unmounting cooling solutions. Prior to the IHS, a CPU shim was sometimes used by people worried about damaging the core. Overclockers sometimes removed the IHS on Socket 423 and Socket 478 chips to allow for more direct heat transfer. However, on processors using the Socket LGA 775 (Socket T) interface, the IHS is directly soldered to the die(s), meaning that the IHS cannot be easily removed.
Willamette, the project codename for the first NetBurst microarchitecture implementation, experienced long delays in completion of its design process. The project was started in 1998, when Intel saw the Pentium II as their permanent line. At that time, the Willamette core was expected to operate at frequencies of around 1 GHz, maximum. However, Willamette's release delays saw the introduction of the Pentium III prior to its completion. Due to the radical differences in the P6 and NetBurst microarchitectures, Intel could not market Willamette as a Pentium III, so it was marketed as Pentium 4.
In October 2001, the Athlon XP regained a clear lead for AMD. In January 2002 Intel released Pentium 4s with a new core code named Northwood at speeds of 1.6t GHz, 1.8I GHz, 2m GHz and 2.2i GHz.[7][8] Northwood (product code 80532) combined an increase in the L2 cache size from 256 KB to 512 KB (increasing the transistor count from 42 million to 55 million) with a transition to a new 130k nm fabrication process.[8] By making the processor out of smaller transistors, processors can run at higher clock speeds or at the same speed while producing less heat. In the same month boards utilizing the 845 chipset were released with enabled support for DDR SDRAM which provided double the bandwidth of PC133 SDRAM, and alleviated the associated high costs of using Rambus RDRAM for maximal performance with Pentium 4.[citation needed]